The Fetch-Decode-Execute cycle and its effects on registers

The Fetch-Decode-Execute Cycle; including its effects on registers

1.1.1 Structure and function of the processor

Structure and function of the processor — Note 2 of 5

Candidates need to understand the purpose and stages within the FDE cycle. Candidates need to understand how and when the registers are used within this cycle, and how and where data and addresses are transmitted to/from in each part of this cycle

What you need to know

The processor runs programs by repeatedly carrying out the fetch-decode-execute (FDE) cycle. At A Level you must describe each step precisely in terms of the registers and buses used, and explain how the contents of each register change during the cycle.

What to know

FETCH
1. the address in the PC is copied to the MAR.
2. the address is sent along the address bus and a memory-read signal is sent along the control bus.
3. the instruction at that address is sent along the data bus and copied into the MDR.
4. the PC is incremented so it points to the next instruction.
5. the instruction is copied from the MDR to the CIR.
DECODE: the Control Unit decodes the instruction in the CIR, splitting it into the OPCODE (what to do) and the OPERAND (the data or address to use).
EXECUTE: the instruction is carried out. For example, a load copies data from memory into the ACC (using the MAR and MDR again), an ADD uses the ALU and stores the result in the ACC, and a branch changes the PC.
At the end of each cycle the processor checks for interrupts before starting the next fetch.
Register transfer notation (useful for answers): MAR ← [PC], PC ← [PC] + 1, MDR ← [Memory][MAR], CIR ← [MDR].

Exam technique

Tip:Use the correct register names and say what is COPIED where, e.g. 'the contents of the PC are copied into the MAR'. Vague answers such as 'the instruction is fetched' earn little credit.
Mistake:Saying the PC is incremented after execution. It is incremented during the FETCH stage. A branch instruction may then overwrite it during execution.
Tip:The PC can be incremented at the same time as the memory is read, which is why some descriptions list it before the MDR step. Either order is accepted if the rest of the sequence is correct.