Von Neumann, Harvard and contemporary processor architecture

1.1.1 Structure and function of the processor

Structure and function of the processor — Note 5 of 5

Candidates need to have an understanding of the Von Neumann and Harvard architectures. They should be aware of the different approaches the architectures take to storing instructions and data in memory and the benefits of each approach. Candidates will not be asked about specific aspects of “contemporary processor architecture” unless explicitly named in the specification. They may, however, be asked to show an awareness of how contemporary processors differ from a pure Von Neumann architecture in more open questions.

What you need to know

Von Neumann and Harvard are two approaches to organising how a processor accesses instructions and data. Contemporary processors combine ideas from both. You need to know how each architecture stores instructions and data, and the benefits of each approach.

What to know

Von Neumann benefits: simpler and cheaper design, memory can be allocated flexibly between programs and data.
Von Neumann drawback: the Von Neumann bottleneck — instructions and data cannot be fetched at the same time because they share one bus.
Harvard benefits: instructions and data can be fetched at the SAME time, so it is faster; the two memories can have different sizes and word lengths; instructions can be held in read-only memory so they cannot be overwritten.
Harvard is commonly used in embedded systems, microcontrollers and digital signal processors where speed is important and the program is fixed.
Contemporary processors often use a modified Harvard approach: separate L1 caches for instructions and data inside the processor, with a single shared main memory (Von Neumann) outside it.
Other contemporary features include pipelining, multiple cores and on-chip cache.

Key terms

Exam tipCommon mistake

Von Neumann architecture: Instructions and data are stored in the SAME memory and share the same buses. There is a single control unit and the stored program is fetched and executed sequentially.
Harvard architecture: Instructions and data are stored in SEPARATE memories, each with its own buses.
Common mistake: Saying Harvard architecture has two processors. It has separate MEMORIES and BUSES for instructions and data, not separate processors.

Exam technique

Tip:The specification does not require detailed knowledge of specific contemporary designs, but you may be asked how contemporary processors differ from a pure Von Neumann machine.