The Arithmetic and Logic Unit; ALU, Control Unit Registers: Program Counter; PC, Accumulator; ACC, Memory Address Register; MAR, Memory Data Register; MDR, Current Instruction Register; CIR Buses: data, address and control: how this relates to assembly language programs
1.1.1 Structure and function of the processor
Practise exam questionsStructure and function of the processor — Note 1 of 5
Candidates need to have an understanding of the purpose and function of the core components of a processor. Candidates need to understand the role and components of the ALU. Candidates need to understand the purpose and function or registers within the processor, including the PC, accumulator, MAR, MDR and CIR. Candidates need to understand the purpose, function and role of the data, address and control buses in the processor. Candidates need to understand how assembly language makes use of registers, and how data and addressed are transferred between registers.
The processor is made up of the Arithmetic Logic Unit (ALU), the Control Unit (CU) and a set of registers, connected to main memory by three buses. At A Level you need to know the purpose of each register and bus, and how they are used when an assembly language instruction is carried out.
LDA 20 puts address 20 in the MAR, the value at address 20 arrives in the MDR via the data bus, and is then copied into the accumulator.Exam tipCommon mistake
Carries out arithmetic operations (addition, subtraction, shifts) and logical operations (AND, OR, NOT, comparisons). Results are usually stored in the accumulator.
Decodes instructions and sends control signals to coordinate the movement of data around the processor and to memory and I/O devices.
A very small, very fast storage location inside the processor that holds data, an address or an instruction during processing.
Holds the ADDRESS of the next instruction to be fetched.
Holds the data currently being processed and the RESULTS of operations carried out by the ALU.
Holds the ADDRESS of the memory location about to be read from or written to.
Holds the DATA or instruction that has just been read from memory, or is about to be written to memory.
Holds the instruction currently being decoded and executed, split into an opcode and an operand.
Carries data and instructions between the processor, memory and I/O. It is BIDIRECTIONAL. Its width (number of lines) determines how many bits can be transferred at once.
Carries memory addresses FROM the processor to memory. It is UNIDIRECTIONAL. Its width determines how many locations can be addressed: n lines = 2^n addresses.
Carries control signals such as memory read, memory write, clock, interrupt request and bus request. It is BIDIRECTIONAL.
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Practise 1.1.1 questions